FPGA for Cycles

I suggest in the Cycles render add the ability to use FPGA
How can I take the source codes of Cycles to start slowly sorting out the engine. The engine needs to be connected as a plug-in.
Can you help me with this problem.

Probably this would be done by adding a new device type next to CPU / CUDA / OpenCL, or maybe it would use the OpenCL backend. It depends on the hardware and toolchain that you plan to use.

But as far as I know ray tracing on FPGAs is in more of a research and proof of concept phase, not something that has been proven to be production ready. So I don’t know what your expectation is for this project, but either way you’d need to read the literature on FPGA ray tracing and get a clear idea of the architecture you want to implement, before getting to more specific questions about how it then integrates into Cycles.

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How can you convert the source code for the experimental addition of a new device.
I’ll try to add Fpga.
I wanted to be able to add a custom plugin.
The rendering code on the processor can be changed for Fpga.

It’s not clear to me what you mean by plugin, but Cycles does not support adding new device types as plugins.

There is some code documentation here:
https://wiki.blender.org/wiki/Source/Render/Cycles/Devices
https://wiki.blender.org/wiki/Source/Render/Cycles/Kernel

But I think you really need to understand which architecture you will implement first, which operations will run on the FPGA and which on the CPU, which language the kernel code will be compiled in, etc.

sorry I speak with ignorance … of fpga for opencl I saw only a few videos that explained the theoretical higher performance than gpgpu in case the code develops because fpga works in parallel
would this be something relevant?
https://www.intel.com/content/www/us/en/software/programmable/sdk-for-opencl/overview.html

this is the video that theorizes the superiority of FPGA

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While there may be applications where opencl on an FPGA will undoubtedly be faster, cycles memory requirements will most likely make this endeavor not as successful as you’d hope. Depending on the scene cycles could need gigabytes of memory, several orders of magnitude more than you can synthesize inside the FPGA, so you end up requiring external ram, and you’re competing against 10 Gbps 256bit GDDR5 on a modern gpu, sure you could probably design a custom fpga board with that kind of memory, but for a one-off I very much doubt this be cost effective or an efficient use of time

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You can compile the entire engine and reflash the fpga chip.
The engine cycles itself is written in the language.

Just need a version of the engine cycles for external connection.
So it will be more convenient to work and conduct experiments.
Fpga is faster than Gpu by about 17 times.

https://www.xilinx.com/products/boards-and-kits/vcu1525-p.html

Ideal for data center application developers wanting to leverage the advanced capabilities of Virtex® UltraScale+™ FPGAs. This PCIe® development board is accessible in the cloud and on-premise with the frameworks, libraries, drivers and development tools to support easy application programming with OpenCL™, C, C++ and RTL through the Xilinx SDAccel™ Development Environment.

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this is just my speculation … but I suspect that the new secret intel gpu will be a gpu based on fpga …
since in the past intel has acquired altera fpga, and that from the intel driver structure on linux, intel has upgraded opengl 4.5 on all its gpu, basing the difference between a gpu and another only in performance … I suspect that they will simply add architecture and coding fpga that will parallelize and radically accelerate the existing code … what is now done by their cpu, will be done by the architecture fpga

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In any case, developers need tens of thousands of simple kernels for programming.
Tens of thousands of nuclei would be well run on cycles.
Intel is moving in the right direction.

the sure thing is between machine learning and opencl this is the probable future … fpga is one of the keys

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The entire Cycles kernel will not fit on the FPGA, it’s much too big. Only parts of the kernel can efficiently run on it. To make any real progress you need to look at the existing papers on FPGA raytracing, understand the the architectures and challenges, there’s no easy solutions here.

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just a profane question …
would it be possible in theory to use a hybrid eevee system with the acceleration of cycles for some functionalities (and consequently openCL) in which eevee lacks, such as light paths, the global illumination … etc … …?

in theory from a hybrid would you have any advantage, or there would be a conflict of use of the resources?
maybe it would be possible with two gpu, or an hybrid gpu-cpu?

It’s possible, but not obviously a good idea to merge two completely different architectures. More likely would be porting Eevee to Vulkan and using upcoming ray tracing extensions. But that’s a long way off, and quite off topic here.

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Not to rain on your parade or anything like that, because FPGAs are really cool and all, but I believe that’s a $10,000.00 part that you’re talking about using, which makes it potentially like 50 times more expensive than a GPU.

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For the many scenes, Cycles on GPUs is limited by memory bandwidth and/or latency, not compute power anyway. An FPGA that provides faster computation but has slower memory is likely to perform worse.

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